Nowadays, small LCD devices are more and more commonly used in portable electronic equipment, such as mobile phones, personal digital assistants (PDAs), and the like. Therefore, the issue of reducing power consumption of these kinds of LCD devices is becoming more important.
In order to reduce the power consumption of LCD devices, the LCD industry has developed a kind of technique in which the display status of an LCD device is divided into two modes. One of these is an active display mode, and the other is a static display mode. An example of the static display mode is the image shown on a mobile phone LCD when the mobile phone is in a call waiting status. In the active display mode, the operation of the LCD device is normal full operation. For example, the LCD device may be a thin-film transistor LCD (TFT-LCD) device. In the static display mode, the LCD device uses a static random access memory (SRAM) for supplying power to pixel regions, so as to reduce power consumption.
Referring to FIG. 6, this is a diagram of part of a driving circuit of a conventional active matrix LCD device. The LCD device 100 includes a plurality of parallel scan lines 101, and a plurality of parallel data lines 102 orthogonal to the scan lines 101 so as to define a plurality of single sub pixel units 500. The LCD device 100 also includes a common electrode 107.
Referring to FIG. 7, an enlarged circuit diagram of one of the sub pixel units 500 is shown. The sub pixel unit 500 includes a thin film transistor 104, a pixel electrode 105, and a static display unit 109. The thin film transistor (TFT) 104 is positioned near a crossing of a corresponding scan line 101 and a corresponding data line 102. A gate electrode 1040 of the first TFT 104 is electrically coupled to the corresponding scan line 101, and a source electrode 1041 of the first TFT 104 is electrically coupled to the corresponding data line 102. Further, a drain electrode 1042 of the first TFT 104 is electrically coupled to a corresponding pixel electrode 105. The pixel electrode 105 and the common electrode 107 cooperatively form a capacitor 108.
The static display unit 109 includes an SRAM 1094, a second TFT 1091, and a third TFT 1092. The SRAM 1094 includes four terminals: Vdd, Vss, Vin, and Vout. The terminal Vdd is electrically coupled to a high voltage VH, the terminal Vss is electrically coupled to a low voltage VL, the terminal Vin is electrically coupled to a drain electrode of the second TFT 1091, and the terminal Vout is electrically coupled to a source electrode of the third TFT 1092. A source electrode of the second TFT 1091 is electrically coupled to a drain electrode of the third TFT 1092, and these two electrodes cooperate with each other to form an output terminal of the static display unit 109. The output terminal is electrically coupled to the drain electrode 1042 of the first TFT 104. The gate electrodes of the second and third TFTs 1091 and 1092 are each electrically coupled to a time control register (Tcon, not shown), which is used for controlling the second and third TFTs 1091 and 1092 to turn on or turn off.
The operational process of the SRAM 1094 is as follows. When a high voltage is transmitted into the SRAM 1094 via the terminal Vin, the terminal Vin and the terminal Vout output the voltage of the terminal Vdd and the terminal Vss, respectively; and when a low voltage is transmitted into the SRAM 1094 via the terminal Vin, the terminal Vin and the terminal Vout output the voltage of the terminal Vss and the terminal Vdd, respectively.
The LCD device 100 includes two display modes: active display mode and static display mode. In the active display mode, the operational process of the LCD device 100 is equal to a normal thin film transistor LCD (TFT-LCD) device. That is, each of the static display units 109 does not work, and gray scale voltage is supplied to the pixel electrodes 105 via the data lines 102 and the first TFTs 104 for displaying images.
Referring to FIG. 8, the operational process of the sub pixel unit 500 when in an on state is shown. Plot (A) represents a waveform diagram of scanning voltage supplied to the scan lines 101. Plot (B) represents a waveform diagram of voltage supplied to the data lines 102. Plot (C) represents a waveform diagram of voltage supplied to the gate electrode of the second TFT 1091. Plot (D) represents a waveform diagram of voltage supplied to the gate electrode of the third TFT 1092. Plot (E) represents a waveform diagram of voltage supplied to the pixel electrode 105. Plot (F) represents a waveform diagram of voltage supplied to the common electrode 107. Plot (G) represent a waveform diagram of a difference between voltages supplied to the pixel electrode 105 and the common electrode 107.
When the time t is equal to t1, a scanning voltage is supplied to the gate electrode 1040 of the first TFT 104 via the scan line 101, so as to turn on the first TFT 104. The Tcon turns on the second TFT 1091, while the third TFT 1092 is in an off state. At the same time, the data line 102 provides a high voltage for driving the SRAM 1094 via the first and second TFTs 104 and 1091. When the time t is equal to t2, the first TFT 104 is turned off until a next active display mode. At the same time, a high voltage VH is outputted from the terminal Vdd, and is supplied to the pixel electrode 105 via the second TFT 1091. After that, the Tcon alternately turns on and turns off the second and third TFTs 1091 and 1092, and then the SRAM 1094 alternately supplies the voltage of the terminal Vdd and the terminal Vss to the pixel electrode 105. When t is equal to t3, the second TFT 1091 is turned off, and the third TFT 1092 is turned on. At the same time, a low voltage VL is outputted from the terminal Vss, and is supplied to the pixel electrode 105 via the third TFT 1092. When the time t is equal to t4, the second TFT 1091 is turned on, and the third TFT 1092 is turned off. At the same time, a high voltage VH is outputted from the terminal Vdd, and is supplied to the pixel electrode 105 via the second TFT 1091. The operational process complies with the circulation mentioned above. The common electrode 107 also meet with the circulation. That is, the common electrode 107 is VH at time t1, varying to VL at time t3, and returning to VH at time t4. Therefore, the difference between the pixel electrode 105 and the common electrode 107 is maintained at zero, and the sub pixel unit 500 is in an on state (display white).
The sub pixel unit 500 has an operational process in an off state similar to that in an on state. In detail, a low voltage is provided by the data lines 102 at an initial point in time. When the voltage of the common electrode 107 is a high voltage VH, the voltage of the pixel electrode 105 is a low voltage VL. In addition, when the voltage of the common electrode 107 is a low voltage VL, the voltage of the pixel electrode 105 is a high voltage VH. The difference between the common electrode 107 and the pixel electrode 105 is maintained at VH-VL, and so the sub pixel unit 500 is in an off state (display black).
While the LCD device 100 in the static display mode, voltage is supplied by the static display unit 109. However, the static display unit 109 can only supplied two different voltages, and then each sub pixel unit 500 can only display a gray scale of 2 levels. Each pixel of the LCD device 100 includes three sub pixel units 500, such as red, green and blue sub pixel units 500. Therefore, each pixel of the LCD device 100 can display a gray scale of 8 levels in a static display mode. However, a gray scale of 8 levels is rather limited, and the LCD device 100 is not considered to be capable of displaying rich and colorful images.
It is desired to provide a driving circuit and an LCD device which can overcome the above-described deficiencies.